DIGITAL SYSTEM BCA-1, BSCIT-1, MCA-1

DIGITAL SYSTEM



PART – A (EACH QUESTIONS CONTAIN 1MARKS)

1). Represent the decimal number”835.25” with the associated weights is.

a) 8×100+3×10+5×1+2×0.1+5×0.01
b) 8×100+5×10+5×1+2×0.1+5×0.01
c) 8×100+3×10+3×1+2×0.1+5×0.01
d) None of these

2). Represent the binary number”101.11” with the associated weights is.

a) 8×100+3×10+5×1+2×0.1+5×0.01
b) 1×4+0×2+1×1+1×0.5.+1×0.25
c) 1×3+0×2+1×1+1×0.5.+1×0.25
d) None of these

3). Represent the binary number”1101” equivalent decimal number is.

a) 5.75
b) 13
c) 0.875
d) None of these

4) Following methods are use to convert decimal number to binary equivalent which are.

a) Sum of weight method
b) Repeated division method
c) Repeated multiplication method
d) All of the above
5) Represent the decimal numbers”17.135” into binary using reparative division or multiplication method.
a) 11001.0010
b) 00110.1010
c) 01011.0101
d) 10001.0010
e)



6). Give the weighted representation for the octal number”710.16”.

a) 7×83 + 1×81 + 0×81 + 1×8-1 + 6×8-2
b) 7×82 + 1×81 + 0×82 + 1×8-1 + 6×8-3
c) 7×82 + 1×81 + 0×80 + 1×8-1 + 6×8-2
d) None of these

7) Counting with octal number system is analogous to the counting mythology used in

a) Hex decimal & binary numbering system
b) Binary & octal numbering system
c) Binary & decimal numbering system
d) None of these

8).Represent the decimal number”234.32” into equivalent octal number.

a) 53
b) 0.54921875
c) 143
d) 156.15625

9).Which of the direct relation of between the bases of octal and binary number?

a) 16 = 42
b) 16 = 22
c) 10 = 22
d) 8 = 23
10).Which of the following is indicates that one symbol of octal can be use d to replace one 3-bit representation in binary system?
a) 16 = 42
b) 16 = 22
c) 8 = 23
c) 10 = 22
11). Represent the octal number (4762.513)8 into corresponding binary number.

a) 100111110010.11011011
b) 100111000010.11001011
c) 100111111110.11001011
d) 100111110010.11001011

12).Represent the binary number (101111.001)2 into corresponding octal number.

a) 131.54
b) 658
c) 123.654
d) 57.1

13).Which of the direct relation of between the bases of hexadecimal and binary number?

a) 16 = 42
b) 16 = 24
c) 10 = 22
d) 8 = 23

14). “16 = 24 “which indicates that one symbol of octal can be use d to replace one _____________in binary system.

a) 4-bit representation
b) 3-bit representation
c) 2-bit representation
c) 1-bit representation

15). Represent the hexadecimal number (354.A1)16 into corresponding binary number.

a) 100111110010.11011011
b) 100111000010.11001011
c) 100111111110.11001011
d) 001101010100.10100001

16). Represent the binary No. (101111.001)2 into corresponding hexadecimal number.
a) 59.B
b) 947.A88
c) 2F.2
d) A0.67B

17). Perform the binary addition of the numbers as A= (11100)2 and B= (10011)2 result is .

a) 10100
b) 11001
c) 01001
d) 10111

17). Perform the binary subtraction of the numbers as A= (11100)2 and B= (10011)2 result is.

a) 10100
b) 11001
c) 01001
d) 10111

18).Perform the binary Multiplication of the numbers as A= (1101)2 and B= (11)2 result is .
a) 010100
b) 101001
c) 001001
d) 100111

19).Perform the binary Division of the numbers as A= (1111)2 and B= (11)2 result is .
a) 011
b) 101
c) 001
d) 111

20).Which of the following of the one’s complements and two’s complements of the given binary number (1101110)2.

a) 0010001 and 001010
b) 0010001 and 001011
c) 0010001 and 011010
d) 0010001 and 001110
21).What do you mean by the MSB and LSB

a) Most significant bit
b) Least significant bit
c) Both of above
d) No one is true.

21) BCD stands for.

a) Binary code decimal
b) Binary code digital
c) Basic code decimal
d) None of these.

22).BCD code is the _________ code represented of decimal number.

a) 3-Bit binary weighted
b) 4-Bit binary weighted
c) 8-Bit binary weighted
d) 2-Bit binary weighted

23).Which of the following are the generation of valid BCD codes during BCD addition given as: A= 1000 0110 0111  867 and
B= 0001 0011 0010  +132

a) 1001 1001 1001 = 999
b) 1101 1011 1001 = 999
c) 1001 1001 1001 = 888
d) None of these.

24).Which of the following mathematician to give the Boolean algebra whose name is?

a) George Boolmer
b) George Boolean
c) Denice Richi
d) None of these

25). The output of the Ex- OR and Ex- Nor, logic gate are, when it take two input as “a”
and “B”?

a) A~B + ~AB
b) ~AB + A~B
c) ~AB + AB
d) None of these

26) Which of the following is the correct answer of the equation “A AND B OR C NOT D” is .Where A = 1, B = 0, C =1 and D = 0?
a) 1
b) 0
c) Both
d) None of these
27). Boolean gives the Rules/laws similarly to the laws in linear algebra which are?

a) Commutative laws
b) Associative laws
c) Distributive laws
d) All the above

28). Fill in the blanks of the given Ex-NOR table
A B A Ex-NOR B
0 0 -
0 1 0
1 0 -
1 1 1
a) 1, 0
b) 0, 1
c) 0, 0
d) None of these

29). Fill in the blanks of the given Ex-OR table

A B A Ex-OR B
0 0 -
0 1 1
1 0 -
1 1 0
a) 1, 0
b) 0, 1
c) 0, 0
d) None of these


30). Fill in the blanks of the given NOR table

A B A NOR B
0 0 1
0 1 -
1 0 0
1 1 -
a) 1, 0
b) 0, 1
c) 0, 0
d) None of these

31). Fill in the blanks of the given NAND table

A B A NAND B
0 0 -
0 1 1
1 0 -
1 1 0

a) 1, 0
b) 0, 1
c) 0, 0
d) 1, 1
32). Fill in the blanks of the given OR table

A B A OR B
0 0 -
0 1 1
1 0 -
1 1 1

a) 1, 0
b) 0, 1
c) 0, 0
d) None of these

33). Fill in the blanks of the given OR table

A B A AND B
0 0 -
0 1 0
1 0 -
1 1 1
a) 1, 0
b) 0, 1
c) 0, 0
d) None of these

34).Which one of the Commutative laws,
a) a.b = b.a and a+b = b+a
b) a+(b+c) = (a+b)+c and a.(b.c) = (a.b).c
c) Both
d) None of them

35). Which of the following is belonging to the category Distributive laws,

a) a.b = b.a and a+b = b+a
b) a+(b+c) = (a+b)+c and a.(b.c) = (a.b).c
c) a.(b+c) = (a.b)+(a.c) and a+(b.c) =(a+b).(a+c)
d) None of these.

36).Which of the following is belonging to the category Associative laws,

a) a.b = b.a and a+b = b+a
b) a+(b+c) = (a+b)+c and a.(b.c) = (a.b).c
c) a.(b+c) = (a.b)+(a.c) and a+(b.c) =(a+b).(a+c)
d) None of these.

37).Use the Boolean algebra to simplify the logic functions and realizes the given function and minimized using discrete gates.
F =ab’c+ (abc)’+a’bc’+a’b’c

a) abc+ ab+a’b’c
b) b’c+ ab+a’b’c
c) abc’+ ab+a’b’c
d) bc+ a’b’+a’bc’
38). The compliment of the product from of an expression is equal to the sum of the complements (a.b.c)’ = a’+b’+c’ rules is known is?

a) Demorgan’s laws
b) Associative laws
c) Commutative laws
d) None of these.
39). Solution of the equation f= ((a’ + b)’ C:\WINDOWS\hinhem.scr+ (c.d)’)’ is:

a) a.(b+c)
b) (a+b).c
c) (a’+b).c’
d) a+(b’+ c’)

40).Any combinational logic circuit can be implemented by using the following universal building block.

a) AND
b) OR
c) NAND
d) None of the above

PART – B (EACH QUESTIONS CONTAIN 2 MARKS)

1).The ANDed terms in a sum of product (SOP) form are known as.

a) Minterms
b) Maxterms
c) Both
d) None of the above

2) In the given example function have the number of minterms are.
ab’c + a’bc + abc’ + abc

a) 3
b) 4
c) 5
d) 2

3).The ORed terms in a product of sum (POS) form are known as.

a) Minterms
b) Maxterms
c) Both
d) None of the above

4) In the given example function have the number of minterms are.
(a’+b+c’) . (a’+b’+c) . (a+b’+c)

a) 3
b) 4
c) 5
d) 2

5).If the number of variables are used is n, then the maxterms are notated with a numeric representation starting from________.
a) 20 to 2n
b) 2n-1 to 2n
c) 0 to 2n
d) None of the above
6).Mean term and max term are represented by the symbol are.

a) ∑ and ∏
b) ∏ and γ
c) Μ and ή
d) None of the above
7).The concept of Universal gate is that a given gate should be able to generate all these __________.
a) Combinational circuit
b) Basic gate function/logic
c) Basic logic circuit
d) None of these

8).What does you mean by the truth table and what it gives?

a) It gives the logic entries for the all possible combination of inputs related to the out put.
b) It gives the characteristic of equation/gates.
c) Both
d) None of these

9). There are two basic forms of Boolean expressions are:
a) Sum of product
b) Product of sum
c) Min term & max term
d) Both a and b
10) Demorgan’s theorems are used to represent
The function only with.
Logic gates
Universal gates
Both
None of these

SELECTING TRUE OR FALSE IN STATEMENTS

11).Each flip-flop is clocked by the output of the preceding one

a) True
b) False

12).A decade counter has ten states.

a) True
b) False

13).Counter with truncated sequences have modulus number less than 2n.

a) True
b) False

14).Synchronous counter can be operated in up/down but not in separate mode.

a) True
b) False

15).Shift register are basically are storage devices in which data can be moved in and out in several ways.

a) True
b) False







FILL IN THE BLANKS

16) The analog to digital converter changes an analog into __________

a) A digital output
b) A analog output
c) Both
d) None of these.

17) The DAC can be formed by op- amp and either binary weighted resistors or with______

a) R-2 R Ladder network
b) R-4-R Ladder network
c) True a but not b
d) None of these.

18).Analog to digital converter can be a flash type, single or dual slope integrating type, digital ramp type or ____________.

a) Successive approximation type.
b) Recursion type
c) Iteration type
d) All
19).SOPs can be solved with minterms entries into the K-map with ______ for the respective term.
a) X = 1’s
b) X’ = 0’s
c) Both
d) None of them

20). A decoder which has n input lines to handle n bits. How many output lines it has?

a) n2
b) 2n-1
c) 2n
d) None of these




PART –C (EACH QUESTIONS CONTAIN 4 MARKS)

MATCHING WORDS / PHRASES IN TWO COLUMN

1). Matching the following:

1. Universal logic gates a. A.B
2. Carry output of half adder b. NAND/NOR
3. A circuit with one input
and many output c. Multiplexer
4. Logic of NAND gates d. 0001 10101
5. BCD code of decimal e. A’.B’
number 15

2). Matching the following:

1. Serial-in serial-out
shift register a. data is loaded into all storage at ones
2. Serial-in parallel-out
shift register b. delay data by 1-clock
time for each stage
3. parallel-in, Serial-out
shift register c. taken || data
4.parallal in-parallel out
shift register d. shift data into internal
storage elements


3) De multiplexer is one of the form of multiplexer which perform the reverse operation that of :

a) Decoder
b) Encoder
c) Multiplexer
d) None of these.

3).The difference between a half adder and a full adder is that the half adder does not have:

a) A borrow input
b) A carry input
c) Both
d) None of these.

4).Parity bits are used for ___________in digital codes.

a) Error detection
b) Error correction
c) Both
d) None of these.

5).What do you mean by even and odd
parity bit?

a) Even number of 1’s in a code refer even parity and odd number of 1’s in a code refer odd parity
b) Odd number of 1’s in a code refer even parity and even number of 1’s in a code refer odd parity
c) Even number of 1’s in a code refer odd parity and odd number of 1’s in a code refer odd parity
d) None of these.

6).Latches is bitable elements whose state normally depends on:

a) Semi-stable inputs
b) By stable inputs
c) Both
d) True a but not b

7).Edge triggered flip-flop are bitable elements with synchronous inputs whose state depends on the inputs only at the:

a) Triggering transition of a clock pulse
b) Triggering transition of a clock cycle
c) Transition of a clock cycle
d) None of these.

8) Pulse triggered or master-slave flip-flop are bitable elements with synchronous inputs whose state depends on the:

a) Triggering transition of a clock pulse
b) Transition of a clock cycle
c) Inputs at the leading edge of the clock pulse
d) None of these.

9) The synchronous inputs should not be allowed to change while the:

a) Clock is low
b) Clock s medium
c) Clock is high
d) None of these.

10) A synchronous counter is also called:

a) Asynchronous counter
b) Ripple counter
c) Both
d) None of these.

11) Asynchronous counter are slower because of the

a) Clock delay
b) Ripple clock delay.
c) True a not b
d) Both
12).A combinational circuit called Multiplexer
Which has the characteristic to accept?

a) Multiple inputs & one output only
b) Single inputs & Multiple output
c) Multiple inputs & only one output with 2n selection lines
d) None of these.

13).Which of the following is correct, when
we consider 4:1 Multiplexers.

a) 2- data select lines, 4-Input selected & 1-Output line
b) 4- data select lines, 2-Input selected & 1-Output line
c) 2- data select lines, 4-Input selected & 4-Output line
d) None of these.

14).What do you mean by the priority encoder?

a) It is a logic circuit, which responds to just one input in accordance with the priority define.
b) It is a combinational circuit, which responds to just one input in accordance with the priority defines.
c) Both
d) None of these

15). Code converter is the logic circuits whose inputs are the bit patterns representing numbers

a) In one code & O/P is the corresponding representation in a different code.
b) In one code & O/P is the corresponding representation in a same code.
c) Both
d) None of these


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